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| NJU26101 Digital Signal Processor for TV General Description Package The NJU26101 is a digital signal processor that provides the function of AGC, 3D Sound, Sound Enhancement, Tone Control, and Digital Volume. The NJU26101 is suitable for audio products such as TV, CD radio-cassette, speakers system, and others. NJU26101 FEATURES 3D sound: eala, simulated stereo, SRS 3D Stereo, SRS 3D Mono, SRS TruSurround BBE ViVA, BBE ViVA+ Sound Enhancement: BBE, BBE Mach3Bass, SRS TruBass AGC to control sound-volume difference between channels or programs Tone Control Digital Volume Digital Signal Processor Specification 24bit Fixed-point Digital Signal Processing Maximum Clock Frequency : 38MHz Digital Audio Interface : 2 Input ports / 1 Output port Power Supply : DSP Core : 2.5V, I/O interface: 2.5V ( +3.3V tolerant ) Package : QFP 32pin The detail hardware specification of the NJU26101 is described in the " NJU26100 Series Hardware Data Sheet". In respect to software commands, request NJR. Ver.2003-08-22 -1- NJU26101 Function Block Diagram AD1/SDIN AD2/SSX NJU26101 DSP ARITHMETIC UNIT SERIAL AUDIO INTERFACE BCKO LRO 24-BIT x 24-BIT MULTIPLIER ALU L/R SDO0 SDI0 SDI1 SCL/SCK SDA/SDOUT SERIAL HOST INTERFACE PROGRAM CONTROL RESETX MCK XI XO TIMING GENERATOR ADDRESS GENERATION UNIT BCKI LRI DELAY RAM DATA RAM FIRMWARE ROM GPIO AND CONFIGURATION INTERFACE SEL1 Fig. 1 NJU26101 Block Diagram DSP Block Diagram eala SDI0 AGC Bypass Trim Simulated Stereo SRS 3D Stereo SRS 3D Mono SRS Passive Matrix TruSurround AGC AGC Output Trim SDI1 BBE BBE Mach3Bass SRS TruBass Tone Control SDO0 Master Volume VIVA VIVA+ Fig. 2 NJU26101 Function Diagram -2- Ver.2003-08-22 NJU26101 Pin Configuration VDDR VDDR VDDC VDDC VSSR 24 VSSR 23 VSSC VSSC 22 21 20 19 18 17 SDI0 SDI1 TEST2 LRI BCKI MCK BCKO LRO 25 WDC VSSC VDDC RESETX VSSO XO XI VDDO 16 26 15 27 14 28 NJU26101 13 29 30 31 32 1 2 12 11 10 9 3 4 5 6 7 8 Fig. 3 NJU26101 Pin Configuration TEST0 TEST1 SDO0 SEL1 SCL/SCK SDA/SDOUT AD1/SDIN AD2/SSX Ver.2003-08-22 -3- NJU26101 Pin Description Table 1 Pin Description No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name TEST0 TEST1 SDO0 SEL1 SCL/SCK SDA/SDOUT AD1/SDIN AD2/SSX VDDO XI XO VSSO RESETX VDDC VSSC WDC I/O O O O I I IO I I P I O G I P G O Open Open Audio Data Output L/R Select I2C or Serial bus Pin Description No. 17 18 19 20 21 22 23 24 25 26 27 28 29 Pin Name VDDC VDDC VSSC VSSC VDDR VDDR VSSR VSSR SDI0 SDI1 TEST2 LRI BCKI MCK BCKO LRO I/O P P G G P P G G I I I I I O O O Pin Description DSP Core Supply +2.5V DSP Core Supply +2.5V DSP Core Supply GND DSP Core Supply GND I/O Power +2.5V I/O Power +2.5V I/O Power GND I/O Power GND Power Power Power Power Supply Supply Supply Supply I2C clock / Serial clock I2C I/O / Serial Out I2C Address / Serial In I2C Address/Serial enable OSC Power Supply +2.5V OSC Clock Input OSC Clock Output OSC Power Supply GND Reset Audio Data Input Audio Data Input Connect to GND LR Clock Input Bit Clock Input A/D,D/A Clock Output Bit Clock Output LR Clock Output DSP Core Power Supply 30 +2.5V DSP Core Power Supply 31 GND Clock for Watch Dog Timer 32 * I : Input, O : Output, IO : Bi-directional, P : +Power, G : GND * Package is shown in fig. 3. -4- Ver.2003-08-22 NJU26101 Audio Data Output The NJU26101 audio interface provides industry standard serial data formats of I2S, MSB-first left-justified or MSB-first right-justified. The NJU26101 audio interface provides two data inputs, SDI0 and SDI1, and a data output, SDO0, as shown in table 2 and 3. The input serial data is selected by the firmaware command. Table 2 Symbol SDI0 SDI1 Serial Audio Input Pin Pin No. 25 26 Description Audio Data Input 0 L / R Audio Data Input 1 L / R Table 3 Symbol SDO0 Serial Audio Output Pin Pin No. 3 Description Audio Data Output 0 L / R I C address 2 AD1 and AD2 pins are used to configure the seven-bit SLAVE address of the serial host interface. These pins offer additional flexibility to SLAVE address. 4 addresses could be chosen by AD1 and AD2-pin. The AD1 and AD2-pin addresses are decided by the connections of AD1 and AD2-pin. The AD1 and AD2 addresses should be the same level as AD1 and AD2-pin connections. Table 4 I2C Bus SLAVE Address bit7 bit6 bit5 bit4 Bit3 bit2 bit1 bit0 1 1 0 0 1 1 1 AD2* AD1* R/W *1 AD1 or AD2 address is 0 when AD1 or AD2-pin is "L". AD1 or AD2 address is 1 when AD1 or AD2-pin is "H". The detail I2C bus timing of the NJU26101 is described in the " NJU26100 Series Hardware Data Sheet". Ver.2003-08-22 -5- NJU26101 Firmware Command Table Host processor can control the NJU26101 via I2C bus or 4-Wire serial bus interface. The following table summarizes the available user commands. Table 5 NJU26101 Command No. Command 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 System State Version No. Input Select / Fs Select Input mono mode / Smooth Control Tone Control (Bass @100Hz) Tone Control (Treble @10KHz) Channel Balance Firmware Mode Select AGC Ratio / Boost AGC Threshold Level AGC Output Trim AGC Attack Time / Release Time Command Description Serial Mode, Data Width, MCK, BCK, Master/Slave Firmware Version No. Request 32, 44.1, 48KHz Smooth Control : slow, medium, fast Mono mode : L, R, Mix +/- 12dB +/- 12dB 0dB to -30dB, inf Tone Control, Bass Boost, Sound Enhancement, 3D Surround, AGC AGC Boost : 0, 6, 12, 18, 24dB AGC Ratio : 20:1, 8:1, 4:1, 2:1, inf -6dBFS to -40dBFS 0dB to -31dB AGC Attack Time : 0.1, 0.2, 0.5, 1, 2, 5 [sec] AGC Release Time : 1, 2, 5, 10, 20, 50 [msec] AGC Noise Compressor Threshold -50 dBFS to -96dBFS, -inf Level AGC Bypass Trim 0dB to -31dB Eala Surround Gain SRS 3D Stereo Space / Center BBE VIVA / VIVA+ Surround Gain BBE Counter / BBE Process (BBE I) BBE Level / BBE HF Adjust (BBE III) BBE Mach3Bass fo / Q BBE Mach3Bass Gain SRS TruBass Speaker Size SRS TruBass Bass / Punch Master Volume Master Volume Boost / Dither NOP 0dB to +12dB 0dB to +15dB 0dB to +6dB 0 to 15 Level : 0dB to -15dB HF Adjust : 0 to 15 Fo : 40Hz to 150Hz Q : 2 to 8 0dB to +12dB Medium, Small, Large 0dB to +15dB 0dB to -96dB, -inf Boost : 0, 6, 12, 18, 24dB Dither: -98 to -128dB, off No Operation In respect to detail command information, request NJR. -6- Ver.2003-08-22 NJU26101 License Information 1. The SRS technology right incorporated in the NJU26101 are owned by SRS Labs, a U.S. Corporation and licensed to New Japan Radio Co., Ltd. "SRS", "SRS 3D MONO", "SRS TruSurround", "SRS TruBass" are protected under U.S. and foreign patents issued and / or pending. "SRS", "SRS 3D MONO", "SRS TruSurround", "SRS TruBass" and the are trademarks of SRS Labs, Inc. in the United States and selected foreign countries. Neither the purchase of the NJU26101, nor the corresponding sale of audio enhancement equipment conveys the right to sell commercialized recordings made with any SRS technology. SRS Labs requires that all users of the NJU26101 must enter into a license agreement directly with SRS Labs if the royalty is not Included in the purchase price. SRS Labs also requires any users to comply with all rules and regulations as outlined in the SRS Trademark Usage Manual. For further information, please contact: SRS Labs, Inc. 2909 Daimler Street. Santa Ana, CA 92705 USA Tel: 949-442-1070 Fax: 949-852-1099 http://www.srslabs.com 2. The NJU26101 is manufactured by New Japan Radio Co.,Ltd. under license from BBE Sound Inc. BBE is a registered trademark of BBE Sound Inc. A license from BBE Sound Inc. must be required before the NJU26101 can be purchased from New Japan Radio Co.,Ltd. BBE Sound, Inc. 5831 Production Drive Huntington Beach, CA 92649 USA Tel: 714-897-6766 Fax: 714-896-0736 http://www.bbesound.com 3. Purchase of I2C components of New Japan Radio Co. ,Ltd or one of sublicensed Associated Companies conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard specification as defined by Philips. Ver. 1.00 [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. Ver.2003-08-22 -7- |
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